Method and apparatus for processing a substrate with minimal edge exclusion

ABSTRACT

An apparatus for processing a material on a surface of a wafer having a diameter includes a cavity defined by a peripheral wall terminating at a peripheral edge and having at least one lateral dimension smaller than the wafer diameter and at least one lateral dimension larger than the wafer diameter and configured to hold a process solution proximate to the peripheral edge such that the process solution will always contact a first wafer surface region, a head configured to hold the wafer above the cavity peripheral edge so that the surface of the wafer faces the cavity, and an electrical contact member positioned outside the cavity peripheral wall and configured to contact a second wafer surface region where the lateral dimension of the cavity is smaller than the wafer diameter and to maintain electrical contact with the wafer when the wafer is moved relative to the contact member. Advantages of the invention include substantially full surface treatment of the wafer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of and claims priority toco-pending U.S. patent application Ser. No. 10/460,032, filed Jun. 11,2003, which is a continuation of U.S. patent application Ser. No.09/760,757, filed Jan. 17, 2001, now U.S. Pat. No. 6,610,190, issuedAug. 26, 2003, which in turn claims priority to U.S. ProvisionalApplication No. 60/245,211, filed Nov. 3, 2000, the disclosures of whichare incorporated by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to electrodeposition processtechnology and, more particularly, to an electrodeposition process thatyields uniform and planar deposits.

2. Description of the Related Art

Conventional semiconductor devices generally include a semiconductorsubstrate, usually a silicon substrate, and a plurality of sequentiallyformed dielectric interlayers such as silicon dioxide and conductivepaths or interconnects made of conductive materials. The interconnectsare usually formed by filling a conductive material in trenches etchedinto the dielectric interlayers. In an integrated circuit, multiplelevels of interconnect networks laterally extend with respect to thesubstrate surface. The interconnects formed in different layers can beelectrically connected using vial or contacts. A conductive materialfilling process of such features, i.e., via openings, trenches, pads orcontacts, can be carried out by depositing a conductive material overthe substrate including such features. Excess conductive material on thesubstrate can then be removed using a planarization and polishingtechnique such as chemical mechanical polishing (CMP).

Copper (Cu) and Cu alloys have recently received considerable attentionas interconnect materials because of their superior electromigration andlow resistivity characteristics. The preferred method of Cu depositionis electrodeposition. During fabrication, copper is electroplated orelectrodeposited on substrates that are previously coated with barrierand seed layers. Typical barrier materials generally include tungsten(W), tantalum (Ta), titanium (Ti), their alloys and their nitrides. Atypical seed layer material for copper is usually a thin layer of copperthat is CVD or PVD deposited on the aforementioned barrier layer.

There are many different designs of Cu plating systems. For example,U.S. Pat. No. 5,516,412 issued on May 14, 1996, to Andricacos et al.discloses a vertical paddle plating cell that is configured toelectrodeposit a film on a flat article. U.S. Pat. No. 5,985,123 issuedon Nov. 16, 1999, to Koon discloses yet another vertical electroplatingapparatus, which purports to overcome the non-uniform depositionproblems associated with varying substrate sizes.

During the Cu electrodeposition process, specially formulated platingsolutions or electrolytes are used. These solutions or electrolytescontain ionic species of Cu and additives to control the texture,morphology, and the plating behavior of the deposited material.Additives are needed to make the deposited layers smooth and somewhatshiny.

There are many types of Cu plating solution formulations, some of whichare commercially available. One such formulation includes Cu-sulfate(CuSO₄) as the copper source (see James Kelly et al., Journal of TheElectrochemical Society, Vol. 146, pages 2540-2545, (1999)) and includeswater, sulfuric acid (H₂SO₄), and a small amount of chloride ions. As iswell known, other chemicals, which are often referred to as additives,can be added to Cu plating solutions to achieve desired properties ofthe deposited material (e.g., see Robert Mikkola and Linlin Chen,“Investigation of the Roles of the Additive Components for SecondGeneration Copper Electroplating Chemistries used for AdvancedInterconnect Metallization”, Proceedings of the InternationalInterconnect Technology Conference, pages 117-119, Jun. 5-7, 2000).

FIGS. 1 through 2 exemplify a conventional electrodeposition method andapparatus. FIG. 1A illustrates a substrate 10 having an insulator layer12 formed thereon. Using conventional etching techniques, features suchas a row of small vias 14 and a wide trench 16 are formed on theinsulator layer 12 and on the exposed regions of the substrate 10. Inthis example, the vias 14 are narrow and deep; in other words, they havehigh aspect ratios (i.e., their depth to width ratio is large).Typically, the widths of the vias 14 are sub-micronic. The trench 16shown in this example, on the other hand, is wide and has a small aspectratio. The width of the trench 16 may be five to fifty times or moregreater than its depth.

FIGS. 1B-1C illustrate a conventional method for filling the featureswith copper material. FIG. 1B illustrates that a barrier/glue oradhesion layer 18 and a seed layer 20 are sequentially deposited on thesubstrate 10 and the insulator 12. The barrier layer 18 may be Ta, W,Ti, their alloys, their nitrides or combinations of them. The barrierlayer 18 is generally deposited using any of the various sputteringmethods, by chemical vapor deposition (CVD), or by electroless platingmethods. Thereafter, the seed layer 20 is deposited over the barrierlayer 18. The seed layer 20 is typically copper if the conductor to beplated is also copper and may be deposited on the barrier layer 18 usingvarious sputtering methods, CVD, or electroless deposition or theircombinations.

In FIG. 1C, after depositing the seed layer 20, a conductive materiallayer 22 (e.g., copper layer) is partially electrodeposited thereon froma suitable plating bath or bath formulation. During this step, anelectrical contact is made to the copper seed layer 20 and/or thebarrier layer 18 so that a cathodic (negative) voltage can be appliedthereto with respect to an anode (not shown). Thereafter, the coppermaterial layer 22 is electrodeposited over the substrate surface usingplating solutions, as discussed above. By adjusting the amounts of theadditives, such as the chloride ions, the suppressor/inhibitor, and theaccelerator, it is possible to obtain bottom-up copper film growth inthe small features.

As shown in FIG. 1C, the copper material 22 completely fills the via 14and is generally conformal in the large trench 16, because the additivesthat are used are not operative in large features. For example, it isbelieved that the bottom up deposition into the via 14 occurs becausethe suppressor/inhibitor molecules attach themselves to the top of thevia 14 to suppress the material growth thereabouts. These molecules cannot effectively diffuse to the bottom surface of the via 14 through thenarrow opening. Preferential adsorption of the accelerator on the bottomsurface of the via 14 results in faster growth in that region, resultingin bottom-up growth and the Cu deposit profile as shown in FIG. 1C.Here, the Cu thickness t1 at the bottom surface of the trench 16 isabout the same as the Cu thickness t2 over the insulator layer 12.

As can be expected, to completely fill the trench 16 with the Cumaterial, further plating is required. FIG. 1D illustrates the resultingstructure after additional Cu plating. In this case, the Cu thickness t3over the insulator layer 12 is relatively large and there is a step S₁from the top of the Cu layer on the insulator layer 12 to the top of theCu layer 22 in the trench 16. For integrated circuit (IC) applications,the Cu layer 22 needs to be subjected to CMP or some other materialremoval process so that the Cu layer 22 as well as the barrier layer 18on the insulator layer 12 are removed, thereby leaving the Cu layer onlywithin the features 14 and 16. These removal processes are known to bequite costly.

Methods and apparatus to achieve a generally planar Cu deposit asillustrated in FIG. 1E would be invaluable in terms of processefficiency and cost. The Cu thickness t5 over the insulator layer 12 inthis example is smaller than the traditional case as shown in FIG. 1D,and the height of the step S₂ is also much smaller. Removal of thethinner Cu layer in FIG. 1E by CMP or other methods would be easier,providing important cost savings.

In co-pending U.S. application Ser. No. 09/201,929, entitled “METHOD ANDAPPARATUS FOR ELECTROCHEMICAL MECHANICAL DEPOSITION”, filed Dec. 1, 1998and commonly owned by the assignee of the present invention, a techniqueis disclosed that achieves deposition of the conductive material intothe cavities on the substrate surface while minimizing deposition on thefield regions by polishing the field regions with a pad as theconductive material is deposited, thus yielding planar copper deposits.

FIG. 2A shows a schematic depiction of a prior art electrodepositionsystem 30. In this system, a wafer 32 is held by a wafer holder 34 withthe help of a ring clamp 36 covering the circumferential edge of thewafer 32. An electrical contact 38 is also shaped as a ring andconnected to the (−) terminal of a power supply for cathodic plating.The wafer holder 34 is lowered into a plating cell 40 filled withplating electrolyte 42. An anode 44, which makes contact with theelectrolyte 42, is placed across from the wafer surface and is connectedto the (+) terminal of the power supply. The anode 44 may be made of thematerial to be deposited, i.e., copper, or of an appropriate inert anodematerial such as platinum, platinum coated titanium or graphite. Aplating process commences upon application of power. In this platingsystem, the electrical contact 38 is sealed from the electrolyte andcarries the plating current through the circumference of the wafer 32.However, the presence* of the contact 38 and the clamp 36 at thecircumference of the wafer 30 is an important drawback with this systemand increases the edge exclusion indicated by ‘EE’ in FIG. 2A. As aresult of edge exclusion, a very valuable prime area on the surface ofthe wafer 32 is lost.

FIGS. 1A through 1E show how the features on the wafer surface arefilled with copper. For this filling process to be efficient and uniformthroughout the wafer, it is important that a uniform thickness of copperbe deposited over the whole wafer surface. Thickness uniformity needs tovery good because non-uniform copper thickness causes problems duringthe CMP process. As shown in FIG. 2B, in order to improve uniformity ofthe deposited layers, shields 46 may be included in prior artelectroplating systems such as that shown in FIG. 2A. In such systems,either the wafer 32 or the shield 46 may be rotated. Such shields aredescribed, for example, in U.S. Pat. No. 6,027,631 to Broadbent, U.S.Pat. No. 6,074,544 to Reid et al. and U.S. Pat. No. 6,103,085 to Woo etal.

In view of the foregoing, there is a need for alternativeelectrodeposition processes and systems which minimize edge exclusionproblems and deposit uniform conductive films.

SUMMARY OF THE INVENTION

The present invention involves depositing a conductive material on anentire surface of a semiconductor wafer through an electrodepositionprocess. Specifically, the present invention provides a method and asystem to form a substantially flat conductive material layer on anentire surface of a semiconductor wafer without losing any space on thesurface for electrical contacts, i.e., without wafer edge exclusion.

In one aspect of the present invention, a process for depositingmaterials on a surface of a wafer, without excluding any region forelectrical contacts on the surface wherein the wafer has a maximumlateral dimension, is provided. The process includes the steps ofproviding an anode, supporting a shaping plate between the anode and thesurface of the wafer, flowing an electrolyte through the shaping plateand between the anode and the surface of the wafer, contacting a contactregion of the surface of the wafer with a contact member, and applying apotential difference between the anode and the contact member.

A shaping plate can be supported between the anode and the surface ofthe substrate such that an upper surface of the shaping plate faces asurface of the wafer. The shaping plate includes a plurality of openingssuch that each opening puts the surface of the wafer in fluidcommunication with the anode. The shaping plate has a lateral dimensionthat is longer than the maximum lateral dimension of the wafer. Thecontact members contact contact regions on the surface of the waferoutside of a “recessed” edge of the shaping plate and thereby makeelectrical contact to the surface of the wafer. When the potentialdifference is applied between the anode and the contact member, materialdeposition on a deposition region of the surface of the wafer throughthe shaping plate occurs when the wafer is in a first position. Bymoving the wafer into a second position while contacting the contactregion with the contact member, material deposition on both the contactregions and the deposition region occurs.

According to another aspect of the present invention, a system fordepositing materials on a surface of a wafer having a maximum lateraldimension is provided. The system includes an anode, a shaping platedefining a recessed edge, a liquid electrolyte contained between theanode and the surface of the substrate, and an electrical contact memberfor contacting a contact region on the surface of the substrate outsideof the recessed edge of the shaping plate.

The shaping plate can be supported between the anode and the surface ofthe wafer such that an upper surface of the shaping plate faces thesurface of the wafer. The shaping plate includes d plurality ofopenings. The upper surface of the shaping plate has a lateral dimensionthat is longer than the maximum lateral dimension of the wafer. Theliquid electrolyte flows through the openings of the shaping plate andagainst the surface of the wafer such that the electrolyte alwayscontacts a first region of the surface of the wafer. The electricalcontact member establishes electrical contact with a second region ofthe surface of the wafer outside of the recessed edge of the shapingplate. The second region intermittently contacts the electrolyte whenthe wafer is rotated over the shaping plate.

According to still another aspect of the invention, a system by whichconductive material can be deposited out of an electrolyte onto asurface of a semiconductor substrate includes an assembly by which theelectrolyte is supplied to the surface of the substrate duringdeposition of the material, and an anode which is contacted by theelectrolyte during this deposition. At least one contact is electricallyinterconnected with the surface at a selected area of the surface duringthe deposition. Deposition of the material progresses discontinuously onthe selected area and continuously on the rest of the surface as atleast one of the contact and the surface moves with respect to the otherduring application of a potential difference between the anode and thecontact.

A device which alleviates non-uniformity between deposition of thematerial on the selected area and on the rest of the surface can beprovided. The device can include a shield, with openings definedtherein, disposed between the anode and the surface to alter an electricfield distribution. Alternatively, the device can include a perforatedplate provided between the anode and the surface with asperity regionshaving different degrees of open area.

The assembly by which electrolyte is supplied may include a cup defininga cavity through which the electrolyte flows during deposition of theconductive material. The anode can be received in the cavity, while thecontact is disposed outside of said cavity. The assembly furtherincludes an inlet for supplying the electrolyte to the cavity.

A rotatable, and preferably translatable, carrier holds the substrateduring deposition of the conductive material so as to move the surfaceof the substrate with respect to the contact.

The shaping plate can be disposed between the anode and the surfaceduring deposition of the conductive material. The shaping plate isporous and permits through flow of the electrolyte.

If the polarity of the system is reversed, the system may be used toremove material, by electroetching, in a uniform manner from the waferor substrate surface instead of depositing the material. In this case,the plating electrolyte may be replaced with a commonly knownelectroetching or electropolishing solution. Also, in this case, theanode may be replaced with an inert electrode made of inert material.

These and other features, aspects and advantages of the presentinvention will become better understood with reference to the followingdrawings, description, and claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a schematic view of a semiconductor substrate having anisolation structure formed on top of the substrate wherein the isolationstructure has been etched to form trench and via features on thesubstrate;

FIG. 1B is a partial cross-sectional view of the substrate shown in FIG.1A wherein a barrier layer and seed layer have been formed on thefeatures and the isolation or insulator layer;

FIG. 1C is a schematic view of the structure shown in FIG. 1B wherein aconventional conformal layer has been partially deposited on the seedlayer;

FIG. 1D is a schematic view of the structure shown in FIG. 1C whereinthe layer has been fully deposited;

FIG. 1E is a schematic view of the structure shown in FIG. 1D wherein amore planar layer has been formed;

FIG. 2A is a schematic view of a prior art electrodeposition system;

FIG. 2B is a schematic view of another prior art electrodepositionsystem utilizing shields;

FIG. 3 is a schematic view of an embodiment of a system of the presentinvention for depositing a conductive material on a full face of a waferwithout excluding any edge regions;

FIG. 4 is a schematic view of the system shown in FIG. 3 showingpositions of the electrical contacts and contact regions on the waferrelative to the width of a peripheral side wall of an anode cup of thepresent invention;

FIG. 5 is a partial plan view of the system shown in FIG. 3 showingintermittent and continuous deposition regions on the wafer;

FIG. 6 is a schematic view of the system of the present invention shownin FIG. 3 including shields placed between an anode and cathode of thesystem;

FIG. 7 is schematic view of another embodiment of a system of thepresent invention for depositing conductive materials on a full face ofa wafer without excluding any edge regions;

FIG. 8 is a partial schematic view of the system in FIG. 7 showing awafer carrier assembly and a shaping plate of the present invention;

FIG. 9A is a plan view of the shaping plate having a wafer positionedabove the shaping plate wherein the wafer has continuous andintermittent deposition regions;

FIG. 9B is a schematic cross sectional view of the shaping plate showingcontinuous asperities through the shaping plate;

FIG. 9C is a schematic view of another embodiment of the shaping plateof the present invention wherein the shaping plate has two regions withdiffering opening densities;

FIG. 10A is a schematic side view of the electrodeposition system of thepresent invention showing the position of the wafer electrical contactson the contact regions relative to the width of the shaping plate of thepresent invention;

FIG. 10B is another schematic side view of the electrodeposition systemof the present invention showing the position of the wafer along thelength of the shaping plate of the present invention;

FIG. 11A is a highly magnified cross sectional view of a wafer havingvia and trench features covered with a seed layer prior to a depositionprocess of the present invention;

FIG. 11B is a schematic view of the structure shown in FIG. 11A, whereinthe deposition layer has been electrodeposited using the presentinvention; and

FIG. 11C is a schematic view of the structure shown in FIG. 11B whereinthe deposition layer has been deposited in a planar manner.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The present invention involves depositing a conductive material on anentire surface or full face of a semiconductor substrate or waferthrough an electrodeposition process. As will be described below, thepresent invention provides a method and a system to form a substantiallyflat conductive material layer on the entire surface of a semiconductorsubstrate without losing any space on the surface for electricalcontacts, i.e., without wafer edge exclusion. The full face depositionprocess of the present invention advantageously achieves deposition of aconductive material in a plurality of cavities, such as trenches, vias,contact holes and the like, on an entire surface of a semiconductorwafer. In one embodiment, the present invention employs a shaping cup oran anode cup and delivers the electrolyte directly onto the surface ofthe wafer so as to deposit conductive material onto the surface of thewafer. In another embodiment, the conductive material is depositedthrough a perforated plate. In this embodiment, the perforated platefacilitates uniform deposition of the conductive material. In yetanother embodiment, the present invention achieves deposition of theconductive material through the perforated plate into the features ofthe surface of the wafer while minimizing the deposition on the topsurface regions between the features by contacting, sweeping andpolishing of the surface with the perforated plate of the presentinvention.

The process of the present invention exhibits enhanced depositioncharacteristics resulting in layers having flatness previouslyunattainable and conductive layers with materials characteristicssurpassing that of prior art layers that have been produced using priorart processes and devices.

Reference will now be made to the drawings wherein like numerals referto like parts throughout. As shown in FIG. 3, in one embodiment, anelectrodeposition system 50 of the present invention may preferablycomprise an upper portion 51 and a lower portion 52. In the preferredembodiment, the system 50 may be used to deposit a conductive materialsuch as copper on a semiconductor wafer such as a silicon wafer. Itshould be noted, however, that although copper is used as an example,the present invention may be used for deposition of other commonconductors such as Ni, Pd, Pt, Au and their alloys. The upper portion 51of the electrodeposition system 50 may be comprised of a carrierassembly having a wafer carrier 53, shown in FIG. 3 holding an exemplarywafer 54, which is attached to a carrier arm 55.

The lower portion 52 of the system 50 may be comprised of an anodeassembly comprising an anode 56 which is preferably placed into anenclosure such as an anode cup 57 or a shaping cup. The anode cup 57 maycomprise an inner cavity 58 or housing defined by a peripheral side wall59 raised above a bottom wall 60. An upper rim frame 61 of theperipheral side wall 59 forms the upper end of the anode cup 57. In thisembodiment, the upper rim frame 61 is preferably rectangular in shapeand the plane of the rim frame is adapted to be substantially parallelto the wafer 54 when the wafer carrier 53 is lowered toward the rimframe 61. As shown in FIG. 5, the rim frame has a maximum lateraldimension D. A copper plating electrolyte 62 may be pumped into theanode cup 57 through a liquid inlet 63 formed in the bottom wall 60 inthe direction of arrow 264. The anode cup and the inlet thus form atleast part of an assembly by which the electrolyte 62 can be supplied toa front surface of a semiconductor wafer or substrate. During theelectrodeposition process, the anode cup 57 is entirely filled withelectrolyte 62 up to the rim frame 61. The anode 56 is electricallyconnected to a positive terminal of a voltage source (not shown) throughan anode connector 64. During the electrodeposition process, the wafer54 is kept substantially parallel as well as in close proximity to therim frame 61 and rotated. By controlling the flow rate of theelectrolyte 62, the electrolyte makes contact with a front surface 65 ofthe wafer which is in close proximity. Excess electrolyte flows downover the peripheral side walls 59 and is collected for recycling.

In this embodiment, it is understood that electrical contact members 66contact or otherwise electrically interconnect with wafer 54 on contactregions 67 of the front surface 65. The position of the contact regions67 vary circularly with respect to the rim frame 61 as the wafer 54 isrotated over anode cup 57. The contact members 66 are connected to anegative voltage source (not shown) using the connectors 68.

As shown in FIG. 4, the wafer carrier 53 holds the wafer 54 from a backsurface 69 of the wafer 54 and against a chuck face of the wafer carrier53. The wafer 54 may be retained using vacuum suction or a retainingring 70 (shown in FIG. 4) or both, thereby fully exposing a frontsurface 65 and the contact regions 67 of the wafer 54. In accordancewith the principles of the present invention, the wafer 54 defines amaximum lateral dimension d, which is the diameter of the wafer in thiscase. Alternatively, the retaining ring 70 may be an integral part ofthe wafer carrier 53. During the process, the wafer carrier 53 and hencethe wafer 54 may be rotated by rotating the carrier arm 55 about arotation axis 71 or vertical axis of the wafer carrier 53 in a rotationdirection 72. As will be described more fully below, the rotation motionmoves contact regions 67 over the electrolyte 62 and exposes the contactregions 67 to the electrolyte. The combined effect of both the fullexposure of the front surface 65 of the wafer 54 and the ability toexpose the contact regions 67 to the electrolyte 62 by moving them overthe anode cup 57 results in zero edge exclusion on the wafer 54.

As shown in FIGS. 4 and 5, in this embodiment, the peripheral side wall59 of the shaping cup or the anode cup 57 may be generally shaped as arectangular side wall which may comprise a first side wall 73, a secondside wall 74, a third side wall 75 and a fourth side wall 76. In thisembodiment, the first and second side walls 73, 74 may be longer inlength than the length of the third and fourth side walls 75, 76 andform “recessed” edges 77 of the peripheral side wall 59, i.e., edgeswhich are recessed with respect to the circumferential outer edge of thewafer 54. The third and fourth side walls 75, 76 form lateral edges 78of the peripheral side wall of the anode cup 57. In this embodiment, thewidth of the anode cup 57 or the distance between the recessed edges 77is adapted to be smaller than the diameter of the wafer 54, which is themaximum lateral distance d of the wafer, while the length of the anodecup or the distance between the lateral edges, which is the maximumlateral distance D of the rim frame 61, is adapted to be longer than thediameter of the wafer.

Due to the difference between the maximum lateral distance d and thewidth of the upper rim frame, this configuration exposes contact regions67 on the wafer 54 and allows placement of the electrical contactmembers 66 on the contact regions 67. Although in this embodiment therecessed edges 77 are straight, it is within the scope of the presentinvention that the recessed edges 77 may be formed depressed, V-shaped,or in any other possible configuration that allows placement ofelectrical contacts on the front surface 65 of the wafer. It should benoted that, at any given instant, the contact regions 67 on the wafer 54can only be plated with copper when the contact regions 67 are rotatedover the electrolyte 62. In this respect, as the wafer 54 is rotated, afirst area 79, which is shown by a dotted circle in FIG. 5, always staysover the anode cup and is plated continuously. However, in a selected,second, area 80 of the surface, which is outside the first area 79 andis defined by the contact regions, the deposition process progresses ina discontinuous manner. Therefore, the deposition rate in the first area79 and the deposition rate in the second area 80 differ and thus thesecond area 80 may have a thinner deposition layer.

FIG. 6 shows how this non-uniformity in the deposition layer may bealleviated by the use of shields 82. The shields 82 are immersed intothe electrolyte and positioned adjacent to the first area 79 in themanner shown in FIG. 6, although, alternatively, they may rest on theanode 56, if the anode to cathode (wafer) distance is reduced. Theshields 82 may have holes 99 or openings in them. The shields alter theelectric field distribution between the anode and the first area 79 (seeFIG. 5) or the contact regions 67 on the wafer 54 and vary thedeposition rate on the first area 79, thereby modifying the thicknessprofile of the electrodeposited copper across the front surface 65 ofthe wafer. In this embodiment, the shields 82 may be made of anon-conductive material such as a polymer material.

Referring back to FIGS. 4 and 6, in use, the electrolyte is pumped intothe anode cup 57 in the direction of the arrow 264. Once the electrolytefills the anode cup 57, with the applied pressure, the electrolytereaches the front surface 65 of the wafer 54 in the direction of thearrows 81. As previously mentioned, the front surface 65 of the wafer 54is retained at close proximity to the electrolyte. The gap between thefront surface 65 of the wafer 54 and the electrolyte surface can beadjusted by vertically moving the carrier assembly 53 along the axis 71.Subsequent to the adjustment of the distance between the front surface65 and the electrolyte, the electrodeposition process is initiated byapplying a potential difference between the anode 56 and the contactmembers 66. Accordingly, at this stage, the potential difference isselected such that the contact members become more cathodic (−) than theanode. Further, since the contact members touch the front surface 65 ofthe wafer 54, the front surface 65 is also rendered cathodic. As thedeposition process progresses, copper uniformly deposits on the frontsurface 65. As previously mentioned, the contact regions on the wafer 54can only be plated with copper when the contact regions 67 are rotatedover the electrolyte 62 and hence exposed to the electrolyte.Overflowing electrolyte which is depicted by arrows 83 may be collectedand recycled.

As shown in FIG. 7, in another embodiment, an electrodeposition system100 of the present invention may preferably comprise an upper portion102 and a lower portion 104. In the preferred embodiment, the system 100may be used to deposit a conductive material such as copper on asemiconductor wafer such as a silicon wafer. As in the previousembodiment, although copper is used as an example, the present inventionmay be used for deposition of other common conductors such as Ni, Pd,Pt, Au and their alloys. The upper portion 102 of the electrodepositionsystem 100 may be comprised of a carrier assembly having a wafer carrier106, shown in FIG. 7 holding an exemplary wafer 108, which is attachedto a carrier arm 110. The carrier arm may rotate or move the wafer 108laterally or vertically.

The lower portion 104 of the system 100 may be comprised of an anodeassembly comprising an anode 112, preferably a consumable copper anode,and a shaping plate 114. The anode may preferably be placed into anenclosure such as an anode cup 116 and enclosed by an anode plate 118upon which the shaping plate 114 may be placed. The shaping plate 114and the anode plate 118 are both preferably perforated plates. Theshaping plate 114 may comprise a plurality of openings 120 orasperities. The openings 120 are adapted to generally match with theopenings (see FIGS. 10A and 10B) in the anode plate 118 so that whenthey are attached together, corresponding openings form channelsallowing electrolyte to flow through the plates 114 and 118 and wet thefront surface of the wafer 108 during the electrodeposition process.During the electrodeposition process, the wafer 108 may be keptsubstantially parallel to an upper surface 119 of the shaping plate 114and rotated. The wafer may also be moved laterally. A copper platingelectrolyte is pumped into the anode cup 116 through a liquid inlet 121in the direction of arrow 122. Again, therefore, the anode cup and theinlet form at least part of an assembly by which the electrolyte can besupplied to a front surface of a semiconductor wafer or substrate. Theanode 112 is electrically connected to a positive terminal of a voltagesource (not shown) through an anode connector 124. It should be notedthat if the shaping plate 114 is made of a rigid material, the anodeplate 118 may not be needed.

As will be described more fully below, in this embodiment, electricalcontact members 126 contact or otherwise electrically interconnect withthe wafer 108 on contact regions 128. The position of the contactregions 128 varies circularly with respect to the shaping plate 114 asthe wafer 108 is rotated or moved over the shaping plate 114. Thecontact members are connected to a negative terminal of the voltagesource (not shown) using the connectors 129.

As shown in FIG. 8, the wafer carrier 106 holds the wafer 108 from aback surface 130 of the wafer 108. The wafer 108 may be held on a lowerface 131 or a chuck face of the wafer carrier 106 as in the manner shownin FIG. 8. In this embodiment, the wafer is held using vacuum suction ora retaining ring 133 (shown in FIG. 8), or both, thereby fully exposinga front surface 132 of the wafer 108 to the electrolyte. Alternatively,the retaining ring 133 may be an integral part of the wafer carrier 106.During the process, the wafer carrier 106 and hence the wafer 108 may berotated by rotating the carrier arm 110 about a rotation axis 134 orvertical axis of the wafer carrier 106 in a rotation direction 135. Aswill be described more fully below, the rotation motion advantageouslymoves contact regions 128 over the shaping plate 114 and exposes thecontact regions 128 to the electrolyte flowing through the shaping plate(see FIG. 7). The combined effect of both the full exposure of the frontsurface 132 of the wafer 108 and the ability to continuously expose thecontact regions 128 to the electrolyte by moving them over the shapingplate 114 results in zero edge exclusion on the wafer 108.

As shown in FIGS. 9A-9B, in this embodiment, the shaping plate 114 ofthe present invention is generally shaped as a rectangle defined by afirst side wall 136, a second side wall 138, a third side wall 140 and afourth side wall 142. In this embodiment, the first and second sidewalls 136, 138 may be longer than the third and fourth side walls 140,142 and form “recessed” edges 144 of the shaping plate 114, edges whichare recessed with respect to the circumferential outer edge of the wafer108. The third and fourth side walls 140 and 142 form lateral edges 146of the shaping plate 114. The width of the shaping plate 114 or thedistance between the recessed edges is configured to be smaller than thediameter d of the wafer 108. Similar to the previous embodiment, thedistance between the lateral edges 146 is the maximum lateral dimensionD of the shaping plate 114. Further, the diameter of the wafer is themaximum lateral dimension d of the wafer 108. Although in the preferredembodiment the shaping plate 114 is shaped as a rectangle, the shapingplate may be given any geometrical form.

As shown in FIG. 9A, the difference between the lateral distances d andthe width of the shaping plate exposes contact regions 128 on the wafer108 and further allows placement of the electrical contact members 126on the contact regions 128 (see FIG. 7). Although in this embodiment therecessed edges are straight in shape, it is within the scope of thepresent invention that the recessed edges may be formed depressed,V-shaped or in any other possible configuration that allows placement ofelectrical contacts on a front surface of a wafer. By choosing the widthand length of the shaping plate 114 as described above, the contactregions 128 can be contacted by or otherwise electrically interconnectedwith the electrical contact members 126 as the wafer 108 is moved in afirst direction 147 over the shaping plate 114. In FIG. 9A, the contactmembers are shown as linear strips which would touch the contact regions128. However, it should be noted that, at a given instant, the contactregions 128 on the wafer can only be plated with copper when the contactregions are rotated over the asperities of the shaping plate 114. Inthis respect, as the wafer is rotated, a first area 148, which is shownby a dotted circle in FIG. 9A, always stays over the shaping plate 114and is plated continuously. However, in a second, selected, area 149,which is outside the first area 148 and is defined by contact regions,the deposition process progresses in a discontinuous manner. Therefore,the deposition rate in the first area 148 and the deposition rate in thesecond area 149 differ and thus the second area 149 is expected to havea slightly thinner deposition layer. As will be described below, thisdifference in thickness can be eliminated using alternative asperitydesigns. Additionally, shields 82 as described above and shown in FIG. 6can be used with this embodiment to provide a uniform deposition layeracross the front surface 132 of the wafer 108.

Referring to FIG. 9B, the asperities 120 are defined by an inner sidewall 150 extending between an upper opening 152 in the upper surface 119and a lower opening 154 in a bottom surface 156 of the shaping plate114. As previously mentioned, during the electrodeposition process, theelectrolyte solution reaches the front surface of the wafer through theasperities 120. Depending on the functionality of the shaping plate 114,the shaping plate 114 may be made of an insulating material or aconductive material. If only electrodeposition is carried out, theshaping plate may be made of a conductive material. However, if theelectrodeposition and polishing are performed together, an insulatingmaterial, such as a polymeric or a ceramic material, is preferred.Although in this embodiment the asperities 120 have rectangular shapes,they may be shaped in various geometrical forms such as oval, square,circular or others. The shape and the volumetric space and the densityof the asperities 120 define the uniformity of the deposited film. Theinner side walls 150 of the asperities 120 do not need to beperpendicular to the upper and bottom surfaces 119 and 156, i.e., theycan be slanted, curved or in other forms or shapes.

FIG. 9C shows an alternative embodiment of the shaping plate 114. Inthis embodiment, the shaping plate 114 comprises first and secondasperity regions 157 and 158 respectively. Due to its design, the secondasperity region 158 has a higher degree of open area than the firstasperity region 157, which results in higher copper deposition on thewafer. When the wafer is plated by oscillating it around position A inthe first region 157, a certain deposition layer thickness profile canbe obtained and the thickness of the deposited layer may be slightlythinner along the contact regions 128. In order to bring up thethickness along the contact regions 128, the wafer can be moved toposition B, and partially over the second region 158, so as to exposecontact regions 128 to higher copper deposition rate. This step may becarried out during a part of the electrodeposition process so that auniform deposition profile of the depositing copper layer is achieved.It is also within the scope of the present invention that such highdensity areas can be formed at one or more locations on the shapingplate 114 and the thickness profile of the depositing layer can bechanged or controlled at will. That is, the thickness profile across afront surface of a wafer can be made concave, convex, or entirely flat.With this embodiment, the edge exclusion can be made zero, i.e., theentire wafer front surface can be uniformly plated all the way to itsedge.

As shown in FIGS. 10A and 10B, the shaping plate 114 is placed on theanode plate 118 having a plurality of holes 159. The holes 159 in theanode plate 118 and the asperities 120 in the shaping plate 114 formcontinuous electrolyte channels 160 connecting an inner cavity 162 ofthe anode cup 116, which is filled with electrolyte during the process,to the upper surface 119 of the shaping plate 114. Electrolyte entersthe anode cup in the direction of arrow 122 and flows through thechannels 160 in the direction of arrows 164. There may be filters (notshown) placed in the inner cavity 162 to catch the particles generatedby the dissolution of the anode 112 during electroplating. The anodeplate 118 may be made of an insulating material or a conductivematerial. For the systems not using a consumable anode, the anode plate118 may be used as anode or another inert cathode can be put in place ofthe anode 112. In such systems, the anode plates can be made of a metalsuch as titanium and can preferably be coated with an inert metal suchas platinum. Accordingly, the positive voltage is connected to the anodeplate rather than to the consumable anode, such as a copper anode in thecase of present invention.

FIG. 10A also shows the position of the contact members 126 contactingcontact regions 128. The contact members may be manufactured in avariety of configurations such as brushes, pins, rollers, flat surfacesand the like. The contact members should be well isolated from theanode, and are preferably stationary with the contact regions slidingover them. The contact members may also move with the wafer. The contactmembers are preferably made of or coated with flexible and corrosionresistant conductive materials such as platinum, ruthenium, rhodium andnitrides of refractory materials and such. As previously mentioned andshown in FIG. 10A, since no conventional clamp is used to establishelectrical contact with the front surface 132 of the wafer 108, edgeexclusion during deposition is advantageously reduced down to zero.Possible scratching of the contact areas by contact members can beavoided or minimized by assuring that the force applied by the contactmembers against the contact regions is minimal.

Referring back to FIG. 10A, in the process of the preferred embodiment,the electrolyte is pumped into the inner cavity 162 of the anode cup 116of the electrodeposition system 100 in the direction of the arrow 122.Once the electrolyte fills the inner cavity 162, the electrolyte reachesthe front surface 132 of the wafer 108 in the direction of the arrow 164by flowing through the holes 159 in the anode plate 118 and then theasperities 120 in the shaping plate 114. Referring now to FIGS. 10A-10B,the front surface 132 of the wafer 108 may be held at a first positionalong the axis 134, preferably at close proximity, for example 0.25-5millimeters distance, to the shaping plate 114. The gap between thefront surface 132 of the wafer 108 and the shaping plate 114 can beadjusted by vertically moving the carrier assembly 102 along the axis134. Subsequent to the adjustment of the distance between the frontsurface 132 and the upper surface of the shaping plate 114, theelectrodeposition process is initiated by applying a potentialdifference between the anode 112 and the contact members 126.Accordingly, at this stage, the potential difference is such selectedthat the contact members become more cathodic (−) than the anode.Further, since the contact members touch the front surface 132 of thewafer 108, the front surface 132 is also rendered cathodic.

At this point, details of the electrodeposition process employing thesystem 100 of the present invention may be further described with helpof FIGS. 11A and 11B. FIG. 11A exemplifies a surface portion 166 of thefront surface 132 of the wafer 108 (see FIG. 8) prior to theelectrodeposition process. The surface portion 166 may comprise a viafeature 168 or a narrow hole and a trench 170 or a larger hole. The viafeature 168 and the trench feature 170 may be formed in an insulatorlayer 172 that is formed on a substrate 174 which may be part of thewafer 108 or be formed on the wafer 108. The features 168 and 170 exposeactive device locations 176 on the substrate 174.

Referring to FIG. 10B, once the potential difference is applied, copperis plated onto the front surface 132 while the wafer 108 is rotated inthe rotational direction 135 and moved linearly in the first direction147 over the shaping plate 114 as in the manner shown in FIG. 10B. Thefirst direction 147 is preferably parallel to the recessed edges 144 andperpendicular to the lateral edges 146. Although the linear motion inthe first direction 147 may preferably be from about 5 millimeters to100 millimeters depending upon the size of the wafer, longer linearmotions are within the scope of this invention and can be utilized. Inthis respect, the rotation of the wafer 108 may be from approximately 1rpm to 250 rpm. Although, it is preferable to move the wafer in lateraldirection, it should be understood that the wafer may be rotated and theanode assembly may be moved laterally to obtain a similar motion betweenthe wafer and the shaping plate. As shown in FIG. 11B, as the depositionprocess progresses, a deposition layer 180 is uniformly formed on thecopper seed layer 178 and fills the via and trench features 168 and 170.As previously mentioned, the copper seed layer 178 may be formed on topof a barrier layer. As also previously mentioned, by rotating wafer 108,non-uniformity of the depositing layer will be minimized. The contactregions 128 on the wafer can only be plated with copper when the contactregions 128 are rotated over the asperities 120 of the shaping plate 114and hence exposed to the electrolyte.

Referring to FIG. 10B, to deposit planar films, the gap between theshaping plate 114 and the front surface of the wafer 108 may be reducedto zero and the front surface 132 is contacted with the upper surface119 of the shaping plate 114 by moving the carrier assembly 102 and thewafer 108 vertically along the axis 134 into a second position. In thiscase the shaping plate may be made of a polishing pad. Alternatively,the anode assembly 104 may be vertically moved along the axis 134, ifthe assembly is equipped for such movement. In this second position, asthe wafer 108 is rotated and moved along the first direction 147, thewafer 108 touches and rubs against the shaping plate 114 while thedeposition process continues. As shown in FIG. 11C, this, in turn, formsa planarized layer 182 by minimizing the thickness of the depositionlayer 180 on the tops of the insulating layer 172 whereas deposition ofmaterial in the features 168 and 170 is unimpeded.

If the polarity of the system is reversed, the system 100 may be used toremove material (electroetching) in a uniform manner from a wafersurface instead of depositing it in a uniform manner. In this case, theplating electrolyte may be replaced with a commonly known electroetchingor electropolishing solution. The Cu anode may be replaced with an inertelectrode made of inert material such as Pt, Ti or Pt coated Timaterials.

It should be understood, of course, that the foregoing relates topreferred embodiments of the invention and that modifications may bemade without departing from the spirit and scope of the invention as setforth in the following claims.

1. A system for depositing materials on a surface of a wafer having amaximum lateral dimension, the system comprising: an anode, the anodebeing placed into a cavity that is defined by a peripheral wallterminating at a peripheral edge, wherein the wafer is supported abovethe peripheral edge of the cavity so that the surface of the wafer facesthe cavity and wherein a lateral dimension of the peripheral edge islonger than the maximum lateral dimension of the wafer; an electrolytefor filing the cavity up to the peripheral edge of the cavity such thatthe electrolyte always contacts a first region of the surface of thewafer; and an electrical contact member for contacting a second regionof the surface of the wafer through a recessed portion of the peripheralwall of the cavity, wherein the second region intermittently contactsthe electrolyte when the wafer is rotated.